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Conference Papers Year : 2009

EFFICIENT AES S-BOXES IMPLEMENTATION FOR NON-VOLATILE FPGAS

Abstract

The paper presents a new efficient method for implementation of the AES byte substitution function (S-box). It is aimed at the AES implementation in non-volatile FPGAs featuring volatile embedded RAM blocks. The method uses a pair of linear feedback shift registers to generate substitution tables into embedded RAMs. The proposed solution requires less space and is faster than the one implementing whole S-boxes in the logic area, and it is especially suited to a power-aware AES implementation. The complete AES cipher implemented in the Actel Igloo family and employing the proposed solution consumes two times less total power and more than 150-times less static power than the same cipher implemented in a competing volatile FPGA technology.
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Dates and versions

ujm-00413111 , version 1 (03-09-2009)

Identifiers

  • HAL Id : ujm-00413111 , version 1

Cite

Lubos Gaspar, Viktor Fischer, Milos Drutarovsky, Nathalie Bochard. EFFICIENT AES S-BOXES IMPLEMENTATION FOR NON-VOLATILE FPGAS. International Conference on Field Programmable Logic and Applications (FPL), Aug 2009, Prague, Czech Republic. pp.649-653. ⟨ujm-00413111⟩
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