Interest in automated methodologies increased last decades due to the ever-growing processing complexity and time-to-market constraints. CAD tools prove their efficiency in power consumption management, which is nowadays a major constraint for embedded systems. Efficient low power techniques for Finite State Machine (FSM) design have been proposed for logic-based controllers. In this paper, we explore the circuit power consumption reduction when the FSM is mapped in ROM blocks. The described methodology achieves power reduction of ROMbased controllers through the transformation of don't care values in the decoder part of the design. This methodology allows a reduction of the number of resource commutations and smoothes them over the processing execution, limiting current spikes. Experiments show that the number of commutation can be decreased from 64% compared to an area-optimized ROM implementation.