About the randomness in Ring Oscillator-based True Random Number Generators in FPGAs
Abstract
The talk deals with true random number generators using a set of ring oscillators as proposed by Sunar et al. in 2007. The original generator has been recently enhanced by Wold and Tan by introducing flip-flops at the output of each ring. We show in the first part of the paper that both original and enhanced architectures have exactly the same behavior when composed of ideal components (they have the same mathematical model), but they have very different behavior in physical devices, as observed by Wold and Tan. However, while reducing the number of rings as they have proposed, the security proof of Sunar et al. does not hold any more. In order to demonstrate that, we will show that the proportion of the pseudo-randomness compared to the truerandomness in the generated random raw signal is much bigger than expected. Our simulation model shows that the generator using more than 18 ideal jitter-free rings having slightly different frequencies and producing thus only pseudo-randomness, will always let the tests pass. We conclude that reducing the number of rings not only makes the security proof of Sunar et al. not hold, but it makes the generator more vulnerable, since the pseudorandomness is easy to manipulate.